Many data processing systems today require the use of at least one cache. A cache memory is a relative fast memory located close to a requester to store data in order to reduce the number of accesses required to a main memory. The processor then uses and manipulates the data in the cache rather than main memory.
In data processing systems in which multiple resources may access and manipulate the data in main memory, it is important to keep coherency between the various resources. Data coherency involves ensuring that every processor within the system accesses the same, latest copy of the data. To ensure the every processor uses the same copy of data, data that has been updated within a processor's cache must periodically be flushed to main memory as new data is stored within the cache memory.
Most cache systems employ a cache replacement algorithm to determine which data will be flushed from cache to make room as new data is stored into the cache. Many replacement algorithms are available, including a least recently used (LRU) algorithm that tracks how recently each cached unit of data is accessed. Variations include a Least Frequently Used (LFU) algorithm, or some combination of the LRU and LFU algorithms. These algorithms generally operate on a cacheable unit of data as defined by the organization of the cache. For example, in a current embodiment that uses a set associated cache, tracking is done on the cache lines included within the same set.
Replacement algorithms are designed to ensure that data that is currently in use or that has been recently accessed is not flushed to main memory. The replacement algorithms are therefore primarily designed to prevent disruption of a processor that has already cached data. The replacement algorithms do not take into consideration, however, the requirements of other processors within the system. For example, data that is used even periodically by a processor may remain within that processor's cache, even if that data is likely to be needed by another processor within the system.
What is needed, therefore, is an improved system and method for selectively flushing data from cache to a main memory under processor control. The mechanism overrides the replacement algorithm that is employed by the system.